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ARM ADRP and ADRL pseudo-instruction

ADRL is similar to the ADR instruction, except ADRL can load a wider range of addresses because it generates two data processing instructions.

  1. In A32, the ADRL pseudo-instruction calculates an offset using two separate ADD or SUB operations.
  2. In A64, on the other hand, ADRL assembles to two instructions, an ADRP followed by an ADD.

ADRP (A64)#

Arm A-profile A64 Instruction Set Architecture | ADRP
ARM Compiler armasm Reference Guide ｜ 5: A64 General Instructions - 5.13 ADRP
Arm Compiler armasm User Guide | 17. A64 General Instructions - 17.13 ADRP (A64): Form PC-relative address to 4KB page.

Load register (PC-relative literal).

Syntax

ADRP Xd, label

label is the program label whose 4KB page address is to be calculated. An offset from the page address of this instruction, in the range ±4GB.

Instruction

Form PC-relative address to 4KB page adds an immediate value that is shifted left by 12 bits, to the PC value to form a PC-relative address, with the bottom 12 bits masked out, and writes the result to the destination register.

ADRP , 
integer d = UInt(Rd);
bits(64) imm = SignExtend(immhi:immlo:Zeros(12), 64);

<label> is the program label whose 4KB page address is to be calculated. Its offset from the page address of this instruction, in the range ±4GB, is encoded as "immhi:immlo"((23:5)<<2 | 30:29) times 4096.

221<<12 = 233 = 2*232 = ±4GB.

ADRP , 
bits(64) base = PC64<63:12>:Zeros(12);
X[d, 64] = base + imm;

Usage

Load Register (literal) calculates an address from the PC value and an immediate offset, loads a word from memory, and writes it to a register. For information about memory accesses, see Load/Store addressing modes in the Arm Architecture Reference Manual Armv8, for Armv8-A architecture profile.

ADRL pseudo-instruction#

A32#

ARM Compiler armasm Reference Guide ｜ 3: A32 and T32 Instructions - 3.21 ADRL pseudo-instruction
Arm Compiler armasm User Guide | 14. A32 and T32 Instructions - 14.12 ADRL pseudo-instruction

Load a PC-relative or register-relative address into a register.

Syntax

ADRL{cond} Rd,label

label is a PC-relative or register-relative expression.

Usage

  1. ADRL always assembles to two 32-bit instructions. Even if the address can be reached in a single instruction, a second, redundant instruction is produced.

  2. If the assembler cannot construct the address in two instructions, it generates an error message and the assembly fails. You can use the LDR pseudo-instruction for loading a wider range of addresses.

  3. ADRL is similar to the ADR instruction, except ADRL can load a wider range of addresses because it generates two data processing instructions.

  4. ADRL produces position-independent code, because the address is PC-relative or register-relative.

  5. If label is PC-relative, it must evaluate to an address in the same assembler area(code section) as the ADRL pseudo-instruction.

Architectures and range

The available range depends on the instruction set in use:

  • A32 The range of the instruction is any value that can be generated by two ADD or two SUB instructions. That is, any value that can be produced by the addition of two values, each of which is 8 bits rotated right by any even number of bits within a 32-bit word. See Operand2 as a constant for more information.
  • T32, 32-bit encoding ±1MB bytes to a byte, halfword, or word-aligned address.
  • T32, 16-bit encoding ADRL is not available.

The given range is relative to a point four bytes (in T32 code) or two words (in A32 code) after the address of the current instruction.

A64#

ARM Compiler armasm Reference Guide ｜ 5: A64 General Instructions - 5.12 ADRL pseudo-instruction
Arm Compiler armasm User Guide | 17. A64 General Instructions - 17.12 ADRL pseudo-instruction

Load a PC-relative address into a register. It is similar to the ADR instruction but ADRL can load a wider range of addresses than ADR because it generates two data processing instructions.

Syntax

ADRL Wd,label
ADRL Xd,label

Usage

  1. ADRL assembles to two instructions, an ADRP followed by ADD.

  2. If the assembler cannot construct the address in two instructions, it generates a relocation. The linker then generates the correct offsets.

  3. ADRL produces position-independent code, because the address is calculated relative to PC.

Examples

ADRL x0, mylabel ; loads address of mylabel into x0

references#

ARM Compiler armasm Reference Guide

  • 3: A32 and T32 Instructions - 3.3 Memory access instructions

ARM Cortex-A Series Programmer's Guide for ARMv8-A

  • 5: An Introduction to the ARMv8 Instruction Sets - 5.1 The ARMv8 instruction sets - 5.1.2 Addressing - Increased PC-relative offset addressing

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